VLIW ARCHITECTURE
- Very long instruction word (VLIW) architecture is another architecture used for P-DSP's (Example:TMS320C6X).
- The VLIW processor consists of architecture that reads a relatively large group of instructions and executes them at the same time.
- These P-DSP's have a number of processing units (data paths).
- In other words, they have a number of ALU's, MAC units, shifters etc.
- The VLIW is accessed from memory and is used to specify the operands and operations to be performed by each of the data paths.
- The VLIW processing increases the number of instructions that are processed per cycle. The multiple functional units share a common multi-ported register file for fetching the operands and storing the results.
- The read/write cross bar provides parallel random access by multiple functional units to the multi-ported register file.
- Execution of the operations in the functional units is carried out concurrently with the load/store operation of data between a RAM and the register file.
- The performance gains that can be achieved with VLIW architecture depends on the degree of parallelism in the algorithm selected for a DSP application and the number of functional units.
- The through put will be higher only if the algorithm involves execution of independent operations
- For example by using eight functional units, the time required for convolution can be reduced by a factor of 8 compared to the case where a single functional unit is used.
- However, it may not always be possible to have independent stream of data for processing.
- Further the number of functional units is also limited by the hardware cost for the multi-ported register file and cross bar switch.
