snehaworld: IMPORTANT QUESTIONS

VLSI IMPORTANT QUESTIONS

UNIT - 1

1) Derive the relationship between drain and source current Ids versus drain to source voltage Vds in a non-saturation and saturation region?

2) What are the involved in the given fabrication process? Explain with neat sketch i)nmos ii)pmos iii)cmos
3) Compare Bicmos technology with other technologies?
4) Design a stick diagram for i)nmos logic Y=(A+B+C)whole bar ii)for cmos logic Y=(A+B+C)whole bar?
5) Explain with suitable examples how to design the layout of a epte to maximum performance and minimize area?
6) Compare the relative merits of three different forms of pull-up for an inverter circuit? What is the best choice for realization in nmos and cmos technology?
7) Explain the concept of VLSI design flow and flowchart of VLSIdesign flows & write the domain of VLSI design flow and Y chart of design flow?
8) What is a stick diagram? Draw the stick diagram and layout for cmos inverter?
9) Derive an expression for transconductance of an n-channel enhancement MOSFET operating in active region ?
10) Explain about 2micrometer CMOS design rules and discuss with layout examples ?

UNIT -2

11) What is meant by sheet resistance (Rs) ? Explain the concept of Rs applied to the mos Transistors ?
12) What is inverter delay? How delay is calculated for multiple stages ? Explain ?
13)Calculate on resistance of an inverter from Vdd to GND?( Illustrate Problems)
14)Explain the issues involved in driving large capacitor loads in VLSI circuit regions ?
15)Explain the scaling models & factors for device parameters?
16) Explain the limits on logic levels and supply voltage due to noise and current density ?
17) Explain the driving large capacitive loads & propagation delays and of layers ?
18)Design a 2-input Ex-OR using CMOS Transmission gate ?
19) Discuss about choice of fan-in and fan-out selection in gate level design ?

UNIT – 3

20) Explain about regions of operations of MOSFET & modelling of transistor ?
21)Explain how MOSFET acts as a current sources & current sintcs ?
22) Explain the operation of common source MOSFET amplifier with diode connected load & resistive load ?
23) With a neat sketch explain the operation of CS stage with current source load . Also derive its voltage gain ?
24)With a neat sketch describes the operation of common gate amplifier. Also derive its voltage gain ?
25) Describe the operation of source follow (common drain). What are the merits and demerits ?
26) What is current mirror ? Explain the general properties of current mirror with block diagram ?
27) Explain the operation of single stage amplifier with resistive load ?

UNIT – 4

28) Explain the concept of complementary cmos gates have static properties ?
29) Explain Master-Slove Edge-Triggered register & bistability principle?
30) Explain the operation of an SR lacth using NAND gates. Implement it with cmos design ?
31)What are the problems occurred in ultra deep submicron(USDM) technology at analog circuit design ? Hoe they overcome ?
32) Explain the issuses in dynamic design & cascading dynamic gates ?
33)Write short notes on the issues of capacitive coupling in dynamic design?
34) Implement the register of question 8 using cmos logic & explain how 0-0 and 1-1 overlap of clock signal are eliminated ?
35) Explain about dynamic power consumption for cmos gate &dissipation due to direct path currents ?
36) Write a short note on i)Ratioed circuits ii)Dynamic circuits

37) Describe pass transistor briefly with examples ?
38) Explain the following i)Static power dissipation ii) Dynamic power dissipation ?

UNIT – 5

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